In microelectronic devices, different dies containing complex electronic circuits are stacked on top of each other to form the complete device. The circuits on different dies are connected together electrically using vias, interconnects, pads, balls, pins, and other kinds of metallic structures. Vias and interconnects are also used to carry power, data, and control signals into and out of the stack. The interconnection devices on each die are lined up in the design of each die layer to make the appropriate connections. Since the dies in each layer must use the same pattern of vias, interconnects, or pads, any differences between the dies in how the connections are used must occur inside the die. The routing between vias and interconnects and circuits in the die is called a redistribution layer (RDL).
On-die redistribution requires that the RDL be formed using silicon processing vacuum chamber type equipment. This equipment uses a combination of masks with sputtering and plating techniques. Any change in the pattern requires different masks and the sputtering and plating formulas, temperatures and times must be adjusted to accommodate the new pattern. This makes the RDL very expensive to form inside the die and very expensive to change. It is accordingly difficult to adapt the die to different applications such as adapting the die to work with other components in a different stack.
Flexibility may be desired, for example when interfacing a die stack with an external silicon device that couples to the die stack using WB (wire bond) pads. The WB pads may be wired externally at some complexity and expense. However a TSV (Through Silicon Via) type architecture might require a flip-chip connection to the external device. An RDL (Redistribution Layer) may again be needed to make the connections between the external and internal silicon interconnections. When the external device is changed or modified, the masks and processes for the RDL must again be changed.
Electro-plating and etching techniques have been used for wiring in silicon substrates and PCB (printed circuit board). However, the processes are complex and expensive. Wet plating processes have also been used but these can induce a substrate to absorb moisture, requiring a drying step for the resulting module in the packaging or assembly process.